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october 2009 doc id 15532 rev 1 1/40 1 vnd5e050mj-e VND5E050MK-E double-channel high-side driver with analog current sense for automotive applications features general ? inrush current active management by power limitation ? very low standby current ? 3.0 v cmos compatible inputs ? optimized electromagnetic emissions ? very low electromag netic susceptibility ? in compliance with the 2002/95/ec european directive ? very low current sense leakage diagnostic functions ? proportional load current sense ? high-precision current sense for wide currents range ? current sense disable ? overload and short to ground (power limitation) indication ? thermal shutdown indication protections ? undervoltage shutdown ? overvoltage clamp ? load current limitation ? self limiting of fast thermal transients ? protection against loss of ground and loss of v cc ? overtemperature shutdown with auto restart (thermal shutdown) ? reverse battery protected (see figure 29 ) ? electrostatic discharge protection applications all types of resistive, inductive and capacitive loads suitable as led driver description the vnd5e050mj-e and VND5E050MK-E are double-channel high-side drivers manufactured in the st proprietary vipower? m0-5 technology and housed in the tiny powersso-12 and powersso-24 packages. the vnd5e050mj-e and VND5E050MK-E are designed to drive 12 v automotive grounded loads delivering protection, diagnostics and easy 3 v and 5 v cmos compatible interface with any microcontroller. the devices integrate advanced protective functions such as load cu rrent limitatio n, inrush and overload active management by power limitation, overtemperature shut-off with auto-restart and overvoltage active clamp. a dedicated analog current sense pin is associated with every output channel in order to provide enhanced diagnostic functions including fast detection of overload and short-circuit to ground through power limitation indication and overtemperature indication. the current sensing and diagnostic feedback of the whole device can be disabled by pulling the cs_dis pin high to allow sharing of the external sense resistor with other similar devices. max transient supply voltage v cc 41 v operating voltage range v cc 4.5 v to 28 v max on-state resistance(per ch.) r on 50 m current limitation (typ) i limh 27 a off-state supply current i s 2 a (1) 1. typical value with all loads connected. powersso-24 powersso-12 www.st.com
contents vnd5e050mj-e / VND5E050MK-E 2/40 doc id 15532 rev 1 contents 1 block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2.5 electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3 application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 gnd protection network against reverse battery . . . . . . . . . . . . . . . . . . . 22 3.1.1 solution 1: resistor in the ground line (rgnd only) . . . . . . . . . . . . . . . . 22 3.1.2 solution 2: diode (dgnd) in the ground line . . . . . . . . . . . . . . . . . . . . . 23 3.2 load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.3 mcu i/os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 3.4 current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 3.5 maximum demagnetization energy (v cc = 13.5 v) . . . . . . . . . . . . . . . . . 25 4 package and pcb thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.1 powersso-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.2 powersso-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5 package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.1 ecopack ? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.2 powersso-12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 5.3 powersso-24 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 5.4 powersso-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.5 powersso-24 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 6 order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 7 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
vnd5e050mj-e / VND5E050MK-E list of tables doc id 15532 rev 1 3/40 list of tables table 1. pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 table 2. suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 5. power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 6. switching (vcc = 13 v, tj = 25 c) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 table 7. logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 8. protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 table 9. current sense (8 v < v cc < 18 v). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 10. truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 table 11. electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 12. electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 13. electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 14. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 table 15. thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 table 16. powersso-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 table 17. powersso-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 table 18. device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 table 19. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
list of figures vnd5e050mj-e / VND5E050MK-E 4/40 doc id 15532 rev 1 list of figures figure 1. block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 2. configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. current and voltage conventions (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 4. current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 6. delay response time between rising edge of output current and rising edge of current sense (cs enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 8. i out /i sense vs i out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 9. maximum current sens e ratio drift vs load current (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 10. normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 11. overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 12. intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 13. t j evolution in overload or short to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 14. off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 15. high-level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 16. input voltage clamp. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 17. low-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 18. high-level input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 19. hysteresis input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 20. on-state resistance vs tcase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 21. on-state resistance vs vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 22. undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 23. turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 24. ilimh vs tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 25. turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 26. high-level cs_dis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 27. cs_dis voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 28. low-level cs_dis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 29. application schematic (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 30. current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 31. maximum turn-off current versus inductance (for each channel) (1) . . . . . . . . . . . . . . . . . . 25 figure 32. powersso-12 pc board (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 33. rthj-amb vs pcb copper area in open box free air condition (one channel on) . . . . . . . . . 26 figure 34. powersso-12 thermal impedance junction ambient single pulse (one channel on) . . . . . 27 figure 35. thermal fitting model of a double-channel hsd in powersso-12 (1) . . . . . . . . . . . . . . . . . 27 figure 36. powersso-24 pc board (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 37. rthj-amb vs pcb copper area in open box free air condition (one channel on) . . . . . . . . . 29 figure 38. powersso-24 thermal impedance junction ambient single pulse (one channel on) . . . . . 30 figure 39. thermal fitting model of a double-channel hsd in powersso-24 (1) . . . . . . . . . . . . . . . . . 30 figure 40. powersso-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 41. powersso-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 42. powersso-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 figure 43. powersso-12 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 figure 44. powerss0-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 figure 45. powersso-24 tape and reel shipment (suffix ?tr?) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
vnd5e050mj-e / VND5E050MK-E bloc k diagram and pin description doc id 15532 rev 1 5/40 1 block diagram and pin description figure 1. block diagram table 1. pin function name function v cc battery connection. out 1,2 power output. gnd ground connection. must be reverse battery protected by an external diode/resistor network. in 1,2 voltage controlled input pin with hysteres is, cmos compatible. controls output switch state. cs 1,2 analog current sense pin, delivers a curre nt proportional to the load current. cs_dis active high cmos compatible pin, to disable the current sense pin. v cc ch 1 control & diagnostic 1 logic driver v on limitation current limitation power clamp over temp. undervoltage v senseh current sense ch 2 overload protection (active power limitation) in1 in2 cs1 cs2 cs_ dis gnd out2 out1 signal clamp control & diagnostic channels 2
block diagram and pin description vnd5e050mj-e / VND5E050MK-E 6/40 doc id 15532 rev 1 figure 2. configurati on diagram (top view) table 2. suggested connections for unused and not connected pins connection / pin current sense n.c. output input cs_dis floating not allowed x x x x to ground through 1 k resistor x not allowed through 10 k resistor through 10 k resistor powersso-12 ta b = v cc v cc out2 out1 out1 v cc out2 12 11 10 9 8 7 1 2 3 4 5 6 cs_dis gnd in1 cs1 in2 cs2 n.c. input1 gnd v cc n.c. input2 cs_dis. v cc current sense1 n.c. n.c. current sense2 output2 output2 output2 output2 output2 output2 output1 output1 output1 output1 output1 output1 powersso-24 tab = v cc
vnd5e050mj-e / VND5E050MK-E electrical specifications doc id 15532 rev 1 7/40 2 electrical specifications figure 3. current and voltage conventions (1) 1. v fn = v outn - v cc during reverse battery condition. 2.1 absolute maximum ratings stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implie d. exposure to the conditions in table below for extended periods may affect device reliability. refer al so to the stmicroelectronics sure program and other relevant quality document. i s i gnd v cc v cc v sense2 out1 i out1 cs1 i sense1 in1 i in1 v in2 v out2 gnd cs_dis i csd v csd in2 i in2 v in1 out2 i out2 cs2 i sense2 v sense1 v out1 v fn table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage 41 v -v cc reverse dc supply voltage 0.3 v -i gnd dc reverse ground pin current 200 ma i out dc output current internally limited a -i out reverse dc output current 20 a i in dc input current -1 to 10 ma i csd dc current sense disable input current -1 to 10 ma -i csense dc reverse cs pin current 200 ma v csense current sense maximum voltage v cc - 41 to +v cc v
electrical specifications vnd5e050mj-e / VND5E050MK-E 8/40 doc id 15532 rev 1 2.2 thermal data e max maximum switching energy (single pulse) (l = 3 mh, r l = 0 , v bat = 13.5 v, t jstart = 150 c, i out = i liml (typ.) ) 104 mj v esd electrostatic discharge (human body model: r = 1.5 k , c = 100 pf) - in - cs - cs_dis - out - v cc 4000 2000 4000 5000 5000 v v v v v v esd charge device model (cdm-aec-q100-011) 750 v t j junction operating temperature - 40 to 150 c t stg storage temperature - 55 to 150 c table 3. absolute maximum ratings (continued) symbol parameter value unit table 4. thermal data symbol parameter max. value unit powersso-12 powersso-24 r thj-case thermal resistance junction-case (with one channel on) 2.7 2.7 c/w r thj-amb thermal resistance junction-ambient see figure 33 see figure 37 c/w
vnd5e050mj-e / VND5E050MK-E electrical specifications doc id 15532 rev 1 9/40 2.3 electrical characteristics values specified in this section are for 8 v < v cc < 28 v, -40 c < t j < 150 c, unless otherwise stated. table 5. power section symbol parameter test conditions min. typ. max. unit v cc operating supply voltage 4.5 13 28 v v usd undervoltage shutdown 3.5 4.5 v v usdhyst undervoltage shutdown hysteresis 0.5 v r on on-state resistance (1) i out = 2 a, t j = 25 c 50 m i out = 2 a, t j = 150 c 100 i out = 2 a, v cc = 5 v, t j = 25 c 65 v clamp (2) clamp voltage i s = 20 ma 41 46 52 v i s supply current off-state: v cc = 13 v, t j = 25 c, v in = v out = v sense = v csd = 0 v 2 (3) 5 (3) a on-state: v cc = 13 v, v in = 5 v, i out = 0 a 36ma i l(off1) (2) off-state output current (1) v in = v out = 0 v, v cc = 13 v, t j = 25 c 00.013 a v in = v out = 0 v, v cc = 13 v, t j = 125 c 05 v f output-v cc diode voltage (1) -i out = 4 a, t j = 150 c 0.7 v 1. for each channel. 2. special characteristic according to iso/ts 16949. 3. powermos leakage included. table 6. switching (v cc =13 v, t j = 25 c) symbol parameter test cond itions min. typ. max. unit t d(on) turn-on delay time r l = 6.5 (see figure 5 ) 20 s t d(off) turn-off delay time r l = 6.5 (see figure 5 ) 45 s dv out /dt (on) turn-on voltage slope r l = 6.5 see figure 23 v / s dv out /dt (off) turn-off voltage slope r l = 6.5 see figure 25 v / s
electrical specifications vnd5e050mj-e / VND5E050MK-E 10/40 doc id 15532 rev 1 w on switching energy losses during t won r l = 6.5 (see figure 5 ) 0.15 mj w off switching energy losses during t woff r l = 6.5 (see figure 5 ) 0.3 mj table 7. logic inputs symbol parameter test conditions min. typ. max. unit v il low-level input voltage 0.9 v i il low-level input current v in = 0.9 v 1 a v ih high-level input voltage 2.1 v i ih high-level input current v in = 2.1 v 10 a v i(hyst) hysteresis input voltage 0.25 v v icl input voltage clamp i in = 1 ma 5.5 7 v i in = -1 ma -0.7 v csdl low-level cs_dis voltage 0.9 v i csdl low-level cs_dis current v csd = 0.9 v 1 a v csdh high-level cs_dis voltage 2.1 v i csdh high-level cs_dis current v csd = 2.1 v 10 a v csd(hyst) cs_dis hysteresis voltage 0.25 v v cscl cs_dis voltage clamps i csd = 1 ma 5.5 7 v i csd = -1 ma -0.7 table 8. protections and diagnostics (1) symbol parameter test conditions min. typ. max. unit i limh dc short circuit current v cc = 13 v 5 v < v cc < 28 v 19 27 38 38 a a i liml short circuit current during thermal cycling v cc = 13 v, t r < t j < t tsd 7a t tsd (2) shutdown temperature 150 175 200 c t r reset temperature t rs + 1 t rs + 5 c t rs thermal reset of status 135 c t hyst thermal hysteresis (t tsd - t r ) 7c table 6. switching (v cc =13 v, t j = 25 c) (continued) symbol parameter test cond itions min. typ. max. unit
vnd5e050mj-e / VND5E050MK-E electrical specifications doc id 15532 rev 1 11/40 v demag (2) turn-off output voltage clamp i out = 2 a, v in = 0, l = 6 mh v cc - 41 v cc - 46 v cc - 52 v v on output voltage drop limitation i out = 0.1 a, t j = -40 c to +150 c (see figure 7 ) 25 mv 1. to ensure long term reliability under heavy overload or s hort circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. if the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. 2. special characteristic according to iso/ts 16949. table 9. current sense (8 v < v cc < 18 v) symbol parameter test conditions min. typ. max. unit k 0 i out /i sense i out = 0.05 a, v sense = 0.5 v, v csd = 0 v, t j = -40 c to 150 c 1440 2250 3630 k 1 i out /i sense i out = 1 a, v sense = 4 v, v csd = 0 v, t j = -40 c to 150 c t j = 25c...150c 1740 1750 2070 2070 2820 2562 dk 1 /k 1 (1) current sense ratio drift i out = 1 a, v sense = 4 v, v csd = 0 v, t j = -40 c to 150 c -15 15 % k 2 i out /i sense i out = 2 a, v sense = 4 v, v csd = 0 v, t j = -40 c to 150 c t j = 25 c to 150 c 1900 1899 2000 2000 2395 2282 dk 2 /k 2 (1) current sense ratio drift i out = 2 a; v sense = 4 v, v csd = 0 v, t j = -40 c to 150 c -9 9 % k 3 i out /i sense i out = 4 a, v sense = 4 v, v csd = 0 v, t j = -40 c to 150 c t j = 25 c to 150 c 1969 1950 1990 1990 2210 2153 dk 3 /k 3 (1) current sense ratio drift i out = 4 a, v sense = 4 v, v csd = 0 v, t j = -40 c to 150 c -6 6 % i sense0 (2) analog sense leakage current i out = 0 a, v sense = 0 v, v csd = 5 v, v in = 0 v, t j = -40 c to 150 c 01 a i out = 0 a, v sense = 0 v, v csd = 0 v, v in = 5 v, t j = -40 c to 150 c 02 i out = 2 a, v sense = 0 v, v csd = 5 v, v in = 5 v, t j = -40 c to 150 c 01 i ol open load on-state current detection threshold v in = 5 v, 8 v < v cc < 18 v i sense = 5 a 420ma v sense max analog sense output voltage i out = 4 a, v csd = 0 v 5 v table 8. protections and diagnostics (1) (continued) symbol parameter test conditions min. typ. max. unit
electrical specifications vnd5e050mj-e / VND5E050MK-E 12/40 doc id 15532 rev 1 figure 4. current sense delay characteristics v senseh analog sense output voltage in fault condition (3) v cc = 13 v, r sense = 3.9 k 8v i senseh analog sense output current in fault condition (3) v cc = 13 v, v sense = 5 v 9 ma t dsense1h delay response time from falling edge of cs_dis pin v sense < 4 v, 0.5 a < i out < 4 a i sense = 90% of i sense max (see figure 4 ) 40 100 s t dsense1l delay response time from rising edge of cs_dis pin v sense < 4 v, 0.5 a < i out < 4 a i sense = 10% of i sense max (see figure 4 ) 520s t dsense2h delay response time from rising edge of input pin v sense < 4 v, 0.5 a < i out < 4 a i sense = 90% of i sense max (see figure 4 ) 80 250 s t dsen se 2h delay response time between rising edge of output current and rising edge of current sense v sense <4 v, i sense = 90% of i sensemax, i out = 90% of i outmax i outmax = 2 a (see figure 6 ) 40 s t dsense2l delay response time from falling edge of input pin v sense < 4 v, 0.5 a < i out < 4 a i sense = 10% of i sense max (see figure 4 ) 80 250 s 1. parameter guaranteed by design; it is not tested. 2. special characteristic according to iso/ts 16949. 3. fault condition includes: power limitation and overtemperature. table 9. current sense (8 v < v cc < 18 v) (continued) symbol parameter test conditions min. typ. max. unit sense current input load current cs_dis t dsense2h t dsense2l t dsense1l t dsense1h
vnd5e050mj-e / VND5E050MK-E electrical specifications doc id 15532 rev 1 13/40 figure 5. switching characteristics figure 6. delay response time between rising edge of output current and rising edge of current sense (cs enabled) v out dv out /dt (on) t r 80% 10% t f dv out /dt (off) t d(off) t d(on) input t t 90% t won t woff v in i out i sense i outmax i sensemax 90% i sensemax 90% i outmax t dsense2h t t t
electrical specifications vnd5e050mj-e / VND5E050MK-E 14/40 doc id 15532 rev 1 figure 7. output voltage drop limitation figure 8. i out /i sense vs i out v on i out v cc -v out t j =150 o c t j =25 o c t j =-40 o c v on /r on(t) 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 11,522,533,54 i out (a) i out / i sense a b c d e a : max, t j = -40 c to 150 c b : max, t j = 25 c to 150 c c : typical, t j = -40 c to 150 c d : min, t j = 25 c to 150 c) e : min, t j = -40 c to 150 c)
vnd5e050mj-e / VND5E050MK-E electrical specifications doc id 15532 rev 1 15/40 figure 9. maximum current sense ratio drift vs load current (1) 1. parameter guaranteed by design; it is not tested. table 10. truth table conditions input output sense (v csd = 0 v) (1) 1. if the v csd is high, the sense output is at a high-im pedance, its potential depends on leakage currents and external circuit. normal operation l h l h 0 nominal overtemperature l h l l 0 v senseh undervoltage l h l l 0 0 overload h h x (no power limitation) cycling (power limitation) nominal v senseh short circuit to gnd (power limitation) l h l l 0 v senseh negative output voltage clamp ll0 -20 -15 -10 -5 0 5 10 15 20 1234 i out (a) dk/k(%) a b a : max, t j = -40 c to 150 c b : min, t j = 25 c to 150 c
electrical specifications vnd5e050mj-e / VND5E050MK-E 16/40 doc id 15532 rev 1 table 11. electrical transient requirements (part 1) iso 7637-2: 2004(e) test pulse test levels (1) 1. the above test levels must be considered referred to v cc = 13.5 v except for pulse 5b. number of pulses or test times burst cycle/pulse repetition time delays and impedance iii iv min. max. 1 -75 v -100 v 5000 pulses 0.5 s 5 s 2 ms, 10 2a +37 v +50 v 5000 pulses 0.2 s 5 s 50 s, 2 3a -100 v -150 v 1 h 90 ms 100 ms 0.1s, 50 3b +75 v +100 v 1 h 90 ms 100 ms 0.1s, 50 4 -6 v -7 v 1 pulse 100 ms, 0.01 5b (2) 2. valid in case of external load dump clamp: 40 v maximum referred to ground. +65 v +87 v 1 pulse 400 ms, 2 table 12. electrical transient requirements (part 2) iso 7637-2: 2004(e) test pulse test level results iii iv 1c c 2a c c 3a c c 3b c c 4c c 5b (1) 1. valid in case of external load dump clamp: 40 v maximum referred to ground. cc table 13. electrical transient requirements (part 3) class contents c all functions of the device are performed as designed after exposure to disturbance. e one or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to pro per operation without replacing the device.
vnd5e050mj-e / VND5E050MK-E electrical specifications doc id 15532 rev 1 17/40 2.4 waveforms figure 10. normal operation figure 11. overload or short to gnd i out v sense v cs_dis input nominal load nominal load normal operation power limitation i limh > i liml > i out v sense v cs_dis input thermal cycling overload or short to gnd
electrical specifications vnd5e050mj-e / VND5E050MK-E 18/40 doc id 15532 rev 1 figure 12. intermittent overload figure 13. t j evolution in overload or short to gnd i out v sense v cs_dis input i limh > nominal load intermittent overload i liml > overload v senseh > t tsd t r t j evolution in overload or short to gnd i limh > < i liml t j_start t hyst power limitation self-limitation of fast thermal transients input i out t j
vnd5e050mj-e / VND5E050MK-E electrical specifications doc id 15532 rev 1 19/40 2.5 electrical char acteristics curves figure 14. off-state output current figure 15. high-level input current -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 iloff (na) off state vcc=13v vin=vout=0v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 4,5 5 iih (a) vin=2.1v figure 16. input voltage clamp figure 17. low-level input voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 5 5,2 5,4 5,6 5,8 6 6,2 6,4 6,6 6,8 7 vicl (v) lin=1ma -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2 vil (v) figure 18. high-level input voltage figure 19. hysteresis input voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 vih (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1 vihyst (v)
electrical specifications vnd5e050mj-e / VND5E050MK-E 20/40 doc id 15532 rev 1 figure 20. on-state resistance vs t case figure 21. on-state resistance vs v cc -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 ron (mohm) iout= 2a vcc=13v 0 5 10 15 20 25 30 35 40 vcc (v) 0 20 40 60 80 100 ron (mohm) tc=-40c tc=25c tc=125c tc=150c figure 22. undervoltage shutdown figure 23. turn-on voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 2 4 6 8 10 12 14 16 vusd (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 100 200 300 400 500 600 700 800 900 1000 (dvout/dt )on (v/ms) vcc=13v ri=6.5 ohm figure 24. i limh vs t case figure 25. turn-off voltage slope -50 -25 0 25 50 75 100 125 150 175 tc (c) 10 15 20 25 30 35 40 ilimh (a) vcc=13v -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 50 100 150 200 250 300 350 400 450 500 550 600 (dvout/dt )off (v/ms) vcc=13v ri= 6.5 ohm
vnd5e050mj-e / VND5E050MK-E electrical specifications doc id 15532 rev 1 21/40 figure 26. high-level cs_dis voltag e figure 27. cs_dis voltage clamp -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 3,5 4 vcsdh (v) -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 1 2 3 4 5 6 7 8 9 10 vcsdcl(v) icsd = 1 ma figure 28. low-level cs_dis voltage -50 -25 0 25 50 75 100 125 150 175 tc (c) 0 0,5 1 1,5 2 2,5 3 vcsdl (v)
application information vnd5e050mj-e / VND5E050MK-E 22/40 doc id 15532 rev 1 3 application information figure 29. application schematic (1) 1. channel 2 has the same in ternal circuit as channel 1. 3.1 gnd protection network against reverse battery this section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 solution 1: resist or in the ground line (r gnd only) this can be used with any type of load. the following is an indication on how to dimension the r gnd resistor. 1. r gnd 600 mv / (i s(on)max ) 2. r gnd (? v cc ) / (-i gnd ) where -i gnd is the dc reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. power dissipation in r gnd (when v cc < 0: during reverse battery situations) is: equation 1 p d = (-v cc ) 2 / r gnd v cc gnd output d gnd r gnd d ld cu +5v v gnd cs_dis input r prot r prot current sense r sense r prot c ext
vnd5e050mj-e / VND5E050MK-E application information doc id 15532 rev 1 23/40 this resistor can be shared amongst several different hsds. please note that the value of this resistor should be calculated with formula (1) where i s(on)max becomes the sum of the maximum on-state currents of the different devices. please note that if the microprocessor ground is not shared by the device ground then the r gnd produces a shift (i s(on)max * r gnd ) in the input thresholds and the status output values. this shift varies depending on how many devices are on in the case of several high- side drivers sharing the same r gnd . if the calculated power dissipation leads to a large resistor or several devices have to share the same resistor then st sugg ests to utilize solution 2 (see section 3.1.2 ). 3.1.2 solution 2: diode (d gnd ) in the ground line a resistor (r gnd = 1 k ) should be inserted in parallel to d gnd if the device drives an inductive load. this small signal diode can be safely shared amongst several different hsds. also in this case, the presence of the ground network produces a shift ( 600 mv) in the input threshold and in the status output values if the microprocessor ground is not common to the device ground. this shift not varies if more than one hsd shares the same diode/resistor network. 3.2 load dump protection d ld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the v cc max dc rating. the same applies if the device is subject to transients on the v cc line that are greater than the ones shown in the iso 7637-2: 2004(e) table. 3.3 mcu i/os protection if a ground protection network is used and negative transient are present on the v cc line, the control pins is pulled negative. st suggests to insert a resistor (r prot ) in line to prevent the microcontroller i/os pins to latch-up. the value of these resistors is a compromise between the leakage current of microcontroller and the current required by the hsd i/os (input levels compatibility) with the latch-up limit of microcontroller i/os: equation 2 -v ccpeak / i latchup r prot (v oh c - v ih - v gnd ) / i ihmax calculation example: for v ccpeak = - 100 v, i latchup 20 ma and v ohc 4.5 v 5 k r prot 180 k recommended values: r prot =10 k , c ext = 10 nf.
application information vnd5e050mj-e / VND5E050MK-E 24/40 doc id 15532 rev 1 3.4 current sense and diagnostic the current sense pin performs a double function (see figure 30: current sense and diagnostic ): current mirror of the load cu rrent in normal operation, delivering a current proportional to the load one according to a know ratio k x . the current i sense can be easily converted to a voltage v sense by means of an external resistor r sense . linearity between i out and v sense is ensured up to 5v minimum (see parameter v sense in table 9: current sense (8 v < v cc < 18 v) ). the current sense accuracy depends on the output current (refer to current sense electrical characteristics table 9: current sense (8 v < v cc < 18 v) ). diagnostic flag in fault conditions , delivering a fixed voltage v senseh up to a maximum current i senseh in case of the following fault conditions (refer to table 10: truth table ): ? power limitation activation ? over-temperature a logic level high on cs_dis pin sets at the same time all the current sense pins of the device in a high-impedance state, thus di sabling the current monitoring and diagnostic detection. this feature allows multiplexing of the microcontroller analog inputs by sharing of sense resistance and adc line among different devices. figure 30. current sense and diagnostic main mosn 41v outn r sense r prot to uc adc pwr_lim v sense overtemperature current sensen i out /k x i senseh v bat v senseh load v cc gnd cs_dis
vnd5e050mj-e / VND5E050MK-E application information doc id 15532 rev 1 25/40 3.5 maximum demagnetization energy (v cc = 13.5 v) figure 31. maximum turn-off current versus inductance (for each channel) (1) 1. values are generated with r l = 0 . in case of repetitive pulses, t jstart (at beginning of each demagnetization) of every pulse must not exceed t he temperature specified above for curves a and b. 1 10 100 0,1 1 10 100 l (mh) i (a) c: t jstart = 125 c repetitive pulse a: t jstart = 150 c single pulse b: t jstart = 100 c repetitive pulse demagnetization demagnetization demagnetization t v in , i l a b c
package and pcb thermal data vnd5e050mj-e / VND5E050MK-E 26/40 doc id 15532 rev 1 4 package and pcb thermal data 4.1 powersso-12 thermal data figure 32. powersso-12 pc board (1) 1. layout condition of r th and z th measurements (pcb: double layer, thermal vias, fr4 area = 77 mm x 86 mm, pcb thickness = 1.6 mm, cu thickness = 70 m (front and back side), copper areas: from minimum pad lay-out to 8 cm 2 ). figure 33. r thj-amb vs pcb copper area in open box free air condition (one channel on) 30 35 40 45 50 55 60 65 70 0246810 rthj_amb(c/ w) pcb cu heatsink area (cm^ 2)
vnd5e050mj-e / VND5E050MK-E package and pcb thermal data doc id 15532 rev 1 27/40 figure 34. powersso-12 thermal impedance junction ambient single pulse (one channel on) equation 3: pulse calculation formula where = t p /t figure 35. thermal fitting model of a double-channel hsd in powersso-12 (1) 1. the fitting model is a simplified thermal tool and is valid for trans ient evolutions where the embedded protections (power limitation or thermal cycling during ther mal shutdown) are not triggered. 0,1 1 10 100 0,0001 0,001 0,01 0,1 1 10 100 1000 time ( s) zth (c/ w) footprint 8 cm 2 2 cm 2 z th r th z thtp 1 ? () + ? =
package and pcb thermal data vnd5e050mj-e / VND5E050MK-E 28/40 doc id 15532 rev 1 table 14. thermal parameters area/island (cm 2 )footprint28 r1=r7 (c/w) 0.7 r2=r8 (c/w) 2.8 r3 (c/w) 4 r4 (c/w) 8 8 7 r5 (c/w) 22 15 10 r6 (c/w) 26 20 15 c1=c7 (w.s/c) 0.001 c2=c8 (w.s/c) 0.0025 c3 (w.s/c) 0.05 c4 (w.s/c) 0.2 0.1 0.1 c5 (w.s/c) 0.27 0.8 1 c6 (w.s/c) 3 6 9
vnd5e050mj-e / VND5E050MK-E package and pcb thermal data doc id 15532 rev 1 29/40 4.2 powersso-24 thermal data figure 36. powersso-24 pc board (1) 1. layout condition of r th and z th measurements (pcb: double layer, thermal vias, fr4 area = 77 mm x 86 mm, pcb thickness =1.6 mm, cu thickness =70 m (front and back side), copper areas: from minimum pad lay-out to 8 cm 2 ). figure 37. r thj-amb vs pcb copper area in open box free air condition (one channel on) 30 35 40 45 50 55 0246810 rthj_amb(c/w) pcb cu heatsink area (cm^2)
package and pcb thermal data vnd5e050mj-e / VND5E050MK-E 30/40 doc id 15532 rev 1 figure 38. powersso-24 thermal impedan ce junction ambient single pulse (one channel on) equation 4: pulse calculation formula where = t p /t figure 39. thermal fitting model of a double-channel hsd in powersso-24 (1) 1. the fitting model is a simplified thermal tool and is valid for trans ient evolutions where the embedded protections (power limitation or thermal cycling during ther mal shutdown) are not triggered. z th r th z thtp 1 ? () + ? =
vnd5e050mj-e / VND5E050MK-E package and pcb thermal data doc id 15532 rev 1 31/40 table 15. thermal parameters area / island (cm 2 )footprint 2 8 r1 = r7 (c/w) 0.4 r2 = r8 (c/w) 2 r3 (c/w) 6 r4 (c/w) 7.7 r5 (c/w) 9 9 8 r6 (c/w) 28 17 10 c1 = c7 (w.s/c) 0.001 c2 = c8 (w.s/c) 0.0022 c3 (w.s/c) 0.025 c4 (w.s/c) 0.75 c5 (w.s/c) 1 4 9 c6 (w.s/c) 2.2 5 17
package and packing information vnd5e050mj-e / VND5E050MK-E 32/40 doc id 15532 rev 1 5 package and packing information 5.1 ecopack ? in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 5.2 powersso-12 package information figure 40. powersso-12 package dimensions
vnd5e050mj-e / VND5E050MK-E package and packing information doc id 15532 rev 1 33/40 table 16. powersso-12 mechanical data symbol millimeters min. typ. max. a 1.25 1.62 a1 0 0.1 a2 1.10 1.65 b 0.23 0.41 c 0.19 0.25 d4.8 5.0 e3.8 4.0 e0.8 h5.8 6.2 h 0.25 0.5 l 0.4 1.27 k0 8 x1.9 2.5 y3.6 4.2 ddd 0.1
package and packing information vnd5e050mj-e / VND5E050MK-E 34/40 doc id 15532 rev 1 5.3 powersso-24 pa ckage information figure 41. powersso-24 package dimensions
vnd5e050mj-e / VND5E050MK-E package and packing information doc id 15532 rev 1 35/40 table 17. powersso-24 mechanical data symbol millimeters min. typ. max. a 2.15 2.47 a2 2.15 2.40 a1 0 0.075 b 0.33 0.51 c 0.23 0.32 d 10.10 10.50 e7.4 7.6 e0.8 e3 8.8 g 0.1 g1 0.06 h 10.1 10.5 h 0.4 l 0.55 0.85 n 10deg x4.1 4.7 y6.5 7.1
package and packing information vnd5e050mj-e / VND5E050MK-E 36/40 doc id 15532 rev 1 5.4 powersso-12 packing information figure 42. powersso-12 tube shipment (no suffix) figure 43. powersso-12 tape and reel shipment (suffix ?tr?) all dimensions are in mm. base q.ty 100 bulk q.ty 2000 tube length ( 0.5) 532 a1.85 b6.75 c ( 0.1) 0.6 a c b reel dimensions base q.ty 2500 bulk q.ty 2500 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d ( 0.05) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.1) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed
vnd5e050mj-e / VND5E050MK-E package and packing information doc id 15532 rev 1 37/40 5.5 powersso-24 packing information figure 44. powerss0-24 tube shipment (no suffix) figure 45. powersso-24 tape and reel shipment (suffix ?tr?) all dimensions are in mm. base qty 49 bulk qty 1225 tube length (0.5) 532 a 3.5 b 13.8 c (0.1) 0.6 a c b reel dimensions base qty 1000 bulk qty 1000 a (max) 330 b (min) 1.5 c (0.2) 13 f 20.2 g (+2 / -0) 24.4 n (min) 100 t (max) 30.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb. 1986 all dimensions are in mm. tape width w 24 tape hole spacing p0 (0.1) 4 component spacing p 12 hole diameter d (0.05) 1.55 hole diameter d1 (min) 1.5 hole position f (0.1) 11.5 compartment depth k (max) 2.85 hole spacing p1 (0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets sealed with cover tape. user direction of feed
order codes vnd5e050mj-e / VND5E050MK-E 38/40 doc id 15532 rev 1 6 order codes table 18. device summary package order codes tube tape and reel powersso-12 vnd5e050mj-e vnd5e050mjtr-e powersso-24 VND5E050MK-E vnd5e050mktr-e
vnd5e050mj-e / vnd5e 050mk-e revision history doc id 15532 rev 1 39/40 7 revision history table 19. document revision history date revision changes 14-oct-2009 1 initial release.
vnd5e050mj-e / VND5E050MK-E 40/40 doc id 15532 rev 1 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in military , air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2009 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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